Multiple-Bit-Upset and Single-Bit-Upset Resilient 8T SRAM Bitcell Layout with Divided Wordline Structure
نویسندگان
چکیده
منابع مشابه
Single Event Upset (SEU) in SRAM
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ژورنال
عنوان ژورنال: IEICE Transactions on Electronics
سال: 2012
ISSN: 0916-8524,1745-1353
DOI: 10.1587/transele.e95.c.1675